Download This PaperStudy and Performance Analysis of a 32 Bit Arithmetic Logic Unit (ALU) Designed Using Two Different Logic Styles in Deep Submicron (DSM) Technology
International Conference on VLSI and Signal Processing (ICVSP):10-12 January, 2014, IIT Kharagpur
5 Pages Posted: 27 May 2020
Date Written: January 11, 2014
Abstract
The arithmetic logic unit (ALU) is a fundamental component of any processor and as such its performance greatly affects the overall performance of the processor. In this paper we carry out a thorough analysis of a 32 bit ALU designed using both Complementary Metal Oxide Semiconductor (CMOS) and Transmission Gate (TG) logic styles. The analysis focuses on the average power consumption (Pavg), average propagation delay (τp) and the power delay product (PDP) of the ALU which has been designed at both 45nm and 32nm technologies.Tanner EDA tool version 14.1 has been used to do all the simulations.
Keywords: Arthmetic Logic Unit (ALU), Average power consumption, Average propagation delay, Power delay product (PDP), CMOS, TG
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