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EngRN: Very-Large-Scale Integration (Topic)

38 Total downloads

Viewing: 1 - 13 of 13 papers

1.

VLSI Design of Advanced Digital Filters

VLSI Design of Advanced Digital Filters, ISBN 978-3-659-40080-3, Lambert Academic Publishing, Germany
Number of pages: 175 Posted: 24 Apr 2018
Accepted Paper Series
Neonode Inc
Downloads 13
2.

Survey on VLSI Using 8X10 Encoder & 10X8 Decoder without Ripple Counter

International Journal for Innovative Engineering & Management Research, Vol. 07, No. 13, 2018
Number of pages: 7 Posted: 12 Dec 2018
Working Paper Series
Swetha Institute of Technology & Science
Downloads 8
3.

Internet of Things Based High Security Border Surveillance Strategy

Asian Journal of Applied Science and Technology (AJAST) Volume 3, Issue 2, Pages 94-100, April -June 2019
Number of pages: 7 Posted: 11 Jun 2019
Accepted Paper Series
Sethu Institute of Technology, Sethu Institute of Technology and Sethu Institute of Technology
Downloads 5
4.

Energy and Throughput Analysis of Multicast Routing Algorithm for 2D Mesh Network on Chip

Procedia Engineering 30 (2012) 144 – 151,
Number of pages: 8 Posted: 10 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication and affiliation not provided to SSRN
Downloads 2
5.

High Performance VLSI Architecture for Advanced QPSK Modems

Asian Journal of Applied Science and Technology (AJAST) Volume 3, Issue 1, Pages 45-49, Jan-March 2019
Number of pages: 5 Posted: 22 Apr 2019
Accepted Paper Series
Francis Xavier Engineering College - Department of ECE, Students, Francis Xavier Engineering College - Department of ECE, Students, Francis Xavier Engineering College - Department of ECE, Students and Francis Xavier Engineering College - Department of ECE
Downloads 2
6.

Low-Power, Low-Latency Transceiver Design Using d-TGMS Flip-Flop for On-Chip Interconnects

International Journal of Engineering & Technology, 7 (1) (2018) 106-109
Number of pages: 4 Posted: 02 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication, Sri Ramakrishna Engineering College (SREC) and Independent
Downloads 2
7.

Performance Explorations of Multi-Core Network on Chip Router

IJSSST.a.13.01.04
Number of pages: 7 Posted: 02 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication and Indus University
Downloads 2
8.

Hardware Implementation of Pipeline Based Router Design for On-Chip Network

Ictact Journal on Communication Technology, December 2012, Volume: 03, Issue: 04
Number of pages: 5 Posted: 01 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication, affiliation not provided to SSRN and affiliation not provided to SSRN
Downloads 1
9.

Implementation of Scheduling Algorithms for on Chip Communications

International Journal of Computer Applications, Volume 62– No.14, January 2013,
Number of pages: 4 Posted: 01 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication, PSG College of Technology and Indus University
Downloads 1
10.

Implementation of Wormhole Router With Low Power Buffer Management

International Journal of Computer Science and Technology, Vol. 4, Issue 4, Oct - Dec 2013
Number of pages: 4 Posted: 02 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication, affiliation not provided to SSRN, affiliation not provided to SSRN and affiliation not provided to SSRN
Downloads 1
11.

Vlsi Implementation of Area Efficient 2-Parallel Fir Digital Filter

International Journal of VLSI design & Communication Systems (VLSICS) Vol.7, No.5/6, December 2016
Number of pages: 8 Posted: 13 Jun 2019
Working Paper Series
affiliation not provided to SSRN and Department of Mathematics, Motilal Nehru National Instituteof Technology,Allahabad,Prayagraj(UP)-211004,,India
Downloads 1
12.

Evolution of Non-Conventional MOS Device Structures: A Review

The IUP Journal of Telecommunications, Vol. X, No. 2, May 2018, pp. 48-69
Posted: 04 Nov 2018
Accepted Paper Series
IK Gujral Punjab Technical University, Guru Nanak Dev Engineering College and Guru Nanak Dev Engineering College
13.

Low-Power High-Speed Hybrid Multiplier Architectures for Image Processing Applications

Lecture Notes in Computational Vision and Biomechanics
Posted: 02 Apr 2019
Accepted Paper Series
Vel Tech University - School of Electrical and Communication