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Madhavi B.K

JNTUH, Sridevi Women’s Engineering College,Hyderabad,India.

India

  • JNTUH, Sridevi Women’s Engineering College,Hyderabad,India.

SCHOLARLY PAPERS

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Scholarly Papers (2)

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1.

Design of Low Power SAR ADC for ECG Using 45nm CMOS Technology

International Journal of VLSI Design & Communication Systems (VLSICS) Vol.8, No.1, February 2017
Number of pages: 11 Posted: 31 May 2019
Silpa Kesav Velagaleti, Nayanathara K.S. and Madhavi B.K
JNTUH, CVR College of Engineering,Hyderabad, India,, JNTUH, CVR College of Engineering,Hyderabad, India, and JNTUH, Sridevi Women’s Engineering College,Hyderabad,India.
Downloads 429 (169,344)

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Analog-to-Digital Converter, Digital-to-Analog Converter, CMOS, ENOB, SNR and Low power.

2.

A High Accuracy Sample and Hold Circuit with Reduced Non-Linearity Errors for SAR ADC in 45nm CMOS process

Proceedings of International Conference on Sustainable Computing in Science, Technology and Management (SUSCOM), Amity University Rajasthan, Jaipur - India, February 26-28, 2019
Number of pages: 10 Posted: 12 Jun 2019
Silpa Kesav Velagaleti, Nayanathara K.S. and Madhavi B.K
JNTUH, CVR College of Engineering,Hyderabad, India,, JNTUH, CVR College of Engineering,Hyderabad, India, and JNTUH, Sridevi Women’s Engineering College,Hyderabad,India.
Downloads 400 (185,792)
Citation 1

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