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Rakesh Kumar Singh
KNIT, Sultanpur, U.P., 228001, India
India
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KNIT, Sultanpur, U.P., 228001, India
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SCHOLARLY PAPERS
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Scholarly Papers (1)
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Design of 16-bit ALU with Booths Multiplier Using Radix-4 and Its FPGA Implementation
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Design of 16-bit ALU with Booths Multiplier Using Radix-4 and Its FPGA Implementation
Proceedings of International Conference on Sustainable Computing in Science, Technology and Management (SUSCOM), Amity University Rajasthan, Jaipur - India, February 26-28, 2019
Number of pages: 12
Posted: 12 Jun 2019
Prerna Srivastava
and Rakesh Kumar Singh
KNIT, Sultanpur, U.P., 228001, India and KNIT, Sultanpur, U.P., 228001, India
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Abstract:
Design of 16-Bit ALU with Booths Multiplier Using Radix-4 and Its FPGA Implementation
The IUP Journal of Electrical & Electronics Engineering, Vol. XIII, No. 4, October 2020, pp. 30-44
Posted: 31 Mar 2021
Prerna Srivastava
and Rakesh Kumar Singh
KNIT, Sultanpur, U.P., 228001, India and KNIT, Sultanpur, U.P., 228001, India
Abstract:
Arithmetic Logic Unit (ALU), Booths algorithm, VHDL
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