M. Sivaramakrishnaiah

Mechanical Engineering Sri Venkateswara College of Engineering and Technology, Chittor-517127, AP, India

India

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Numerical and Experimental Validation of Chip Morphology

International Journal of Advanced Research in Engineering and Technology, 10 (2), 2019, pp 503-508.
Number of pages: 6 Posted: 11 Mar 2020
M. Sivaramakrishnaiah, P. Nandakumar and G. Ranga Janardhana
Mechanical Engineering Sri Venkateswara College of Engineering and Technology, Chittor-517127, AP, India, Mechanical Engineering, N.B.K.R. Institute of Science & Technology, Vidyanagar, S.P.S.R. Nellore Dist-, AP, India and J N T University College of Engineering
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Abstract:

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FEM, Chip morphology, DOF, Johnson-Cook material model, WC