High Performance Double Edge Triggered D Flip-Flop Based Shift Registers Using CNTFET
The IUP Journal of Electrical & Electronics Engineering, Vol. VII, No. 1, January 2014, pp. 19-32
Posted: 10 Jul 2017
Date Written: 2014
In this paper, a high performance Double Edge Triggered D Flip Flop-based Serial in Serial Out (SISO), Serial In Parallel Out (SIPO), Parallel In Serial Out (PISO) and Parallel In Parallel Out (PIPO) shift registers are designed using Carbon NanoTube Field Effect Transistor (CNTFET). The CNTFET is an efficient device to supersede the current CMOS technology for its excellent electrical and mechanical properties. The CNTFET provides higher electron mobility, higher carrier velocity and better electrostatic control over channel formation. There are various issues like power dissipation, short channel effect, narrow band effect and scaling of the transistors incurred while integrating many number of transistors. To mitigate these issues, the carbon nanotube-based design is considered. To evaluate the performance of CNTFET SISO, SIPO, PISO and PIPO shift registers are analyzed using HSPICE at 1 GHz operating frequency. The simulation results are depicted and the power consumption, delay, PDP, rise time and fall time are compared with the MOSFET-based design. The comparison of results shows that the CNTFET-based design is capable of providing better performance in terms of power as well as speed.
Keywords: MOSFET, CNTFET, DETFF, Shift registers, Power, Delay, PDP, Rise time and Fall time
Suggested Citation: Suggested Citation