Evaluation and Rectification of Security Issues in Embedded Systems

IJCESR 4:1 (2017)

7 Pages Posted: 10 Jan 2017

See all articles by Boselin Prabhu

Boselin Prabhu

VSB College of Engineering

E. Gajendran

Sree Dattha Group of Institutions - Department of Computer Science and Engineering

Date Written: January 8, 2017

Abstract

The present approaches fail to offer appropriate protection from packet sniffing or eavesdropping attacks. In addition, these methods are energy intensive and fail to scale well in energy-constrained situations. Instead of placing the entire matching pattern on the chip, our solution is the parallel intrusion detection system that works by combining extracting as much of the important filtering information as possible onto a chip and infrequently accessing off chip data to make the matching mechanism suitable for large pattern set. Testing is also introduced to clear the bug which is presented in the network application software. It will improve the coverage of the test, clearly saving in cost and development time. The virus detection and testing processor also protect the multi core systems from Real Time attacks and will provide the formal model–based test for multi core system. With the model a test suite can be extracted from the test case generator and a test program generator will generate test programs automatically.

Keywords: Covert Channel, Embedded Systems, Media Access Control, Physical Layer, Soft Security, Embedded Processor, Memory Gap, Model-based test

Suggested Citation

Prabhu, S.R.Boselin and Gajendran, E., Evaluation and Rectification of Security Issues in Embedded Systems (January 8, 2017). IJCESR 4:1 (2017) . Available at SSRN: https://ssrn.com/abstract=2895626

S.R.Boselin Prabhu (Contact Author)

VSB College of Engineering ( email )

Coimbatore, Tamil Nadu
India

E. Gajendran

Sree Dattha Group of Institutions - Department of Computer Science and Engineering ( email )

Hyderabad
India

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