Reliable Security Approach for Wireless Embedded Systems
International Journal of Emerging Technology and Innovative Engineering, Vol. 2, Iss. 11, November 2016
Posted: 20 Jan 2017
Date Written: Novemeber 13, 2016
In order to offer assurance security and reliability, most of the current schemes execute periodic reestablishment of authentication authorizations and share secrets among numerous participating nodes. However, the present approaches fail to offer appropriate protection from packet sniffing or eavesdropping attacks. In addition, these methods are energy intensive and fail to scale well in energy-constrained situations. Instead of placing the entire matching pattern on the chip, our solution is the parallel intrusion detection system that works by combining extracting as much of the important filtering information as possible onto a chip and infrequently accessing off chip data to make the matching mechanism suitable for large pattern set. Testing is also introduced to clear the bug which is presented in the network application software. It will improve the coverage of the test, clearly saving in cost and development time. The virus detection and testing processor also protect the multi core systems from Real Time attacks and will provide the formal model–based test for multi core system. With the model a test suite can be extracted from the test case generator and a test program generator will generate test programs automatically. In this paper a detailed research on efficient processor design structure with reduced memory gap has been elaborated. Both generators are assisted with model checking on the formal model.
Keywords: Embedded Systems, Microprocessors, Security and Reliability
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