Core i7 Specific Energy Efficient Ram Design for IoT Application
Proceedings of 3rd International Conference on Internet of Things and Connected Technologies (ICIoTCT), 2018 held at Malaviya National Institute of Technology, Jaipur (India) on March 26-27, 2018
8 Pages Posted: 9 May 2018
Date Written: April 27, 2018
Fundamental memory has turned out to be one of largest contributors to overall energy consumption and offer many opportunities for power reduction. Power dissipation plays important role in portable products that can store, receive and transmit data because in each operation cycle the power is consumed by the operator. The goal of this paper is to use Frequency scaling approach in Random Access Memory to minimize power dissipation by the help of High Speed Transceiver Logic (HSTL) input output standard. These techniques cover RTL coding. This research suggest that there is 75% reduction clock power 66.66% reduction in Signal power, (35.20% to 47.77%) reduction in IOs power when the frequency are minimize. This design is implemented on Artex-7.
Suggested Citation: Suggested Citation