Simultaneous Optimization of Standby and Active Energy for Sub-threshold Circuits

International Journal of VLSI design & Communication Systems (VLSICS) Vol.7, No.5/6, December 2016

16 Pages Posted: 10 Jun 2019

See all articles by Ali T. Shaheen

Ali T. Shaheen

University of Baghdad - Department of Electrical Engineering

Saleem M. R. Taha

affiliation not provided to SSRN

Date Written: May 23, 2019

Abstract

Increased downscaling of CMOS circuits with respect to feature size and threshold voltage has a result of dramatically increasing in leakage current. So, leakage power reduction is an important design issue for active and standby modes as long as the technology scaling increased. In this paper, a simultaneous active and standby energy optimization methodology is proposed for 22 nm sub-threshold CMOS circuits. In the first phase, we investigate the dual threshold voltage design for active energy per cycle minimization. A slack based genetic algorithm is proposed to find the optimal reverse body bias assignment to set of noncritical paths gates to ensure low active energy per cycle with the maximum allowable frequency at the optimal supply voltage. The second phase, determine the optimal reverse body bias that can be applied to all gates for standby power optimization at the optimal supply voltage determined from the first phase. Therefore, there exist two sets of gates and two reverse body bias values for each set. The reverse body bias is switched between these two values in response to the mode of operation. Experimental results are obtained for some ISCAS-85 benchmark circuits such as 74L85, 74283, ALU74181, and 16 bit RCA. The optimized circuits show significant energy saving ranged (from 14.5% to 42.28%) and standby power saving ranged (from 62.8% to 67%).

Keywords: Dual Threshold Design, Slack Based Genetic Algorithm, Sub-threshold Circuits, Reverse Body Bias, Standby Power

Suggested Citation

Shaheen, Ali T. and Taha, Saleem M. R., Simultaneous Optimization of Standby and Active Energy for Sub-threshold Circuits (May 23, 2019). International Journal of VLSI design & Communication Systems (VLSICS) Vol.7, No.5/6, December 2016. Available at SSRN: https://ssrn.com/abstract=3392929

Ali T. Shaheen (Contact Author)

University of Baghdad - Department of Electrical Engineering

Iraq

Saleem M. R. Taha

affiliation not provided to SSRN

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