Parallelization Overhead and HPC-Efficient Programming

22 Pages Posted: 10 Jun 2019

See all articles by Dongya Koh

Dongya Koh

University of Arkansas - Department of Economics

Date Written: Feb 17, 2019

Abstract

Easier access to high-performance computing (HPC) systems has enabled parallel computing to become more ubiquitous in numerically solving dynamic economic models. Nevertheless, with little understanding of computer architectures and parallel computing algorithms, executing a program with a large number of cores could result in a significant slowdown rather than a speedup. This study exploits new measure—parallelization overhead—to explicitly quantify the size of the inefficiency that predominantly arises from communication overhead and load imbalances in parallel computing. Further, we demonstrate three programming techniques for an HPC-efficient parallel program that effectively reduces the parallelization overhead.

Keywords: parallel computing, overhead, high-performance computing, lifecycle model

JEL Classification: C63, E37

Suggested Citation

Koh, Dongya, Parallelization Overhead and HPC-Efficient Programming (Feb 17, 2019). Available at SSRN: https://ssrn.com/abstract=3393583 or http://dx.doi.org/10.2139/ssrn.3393583

Dongya Koh (Contact Author)

University of Arkansas - Department of Economics ( email )

Fayetteville, AR 72701
United States

HOME PAGE: http://https://sites.google.com/site/dongyakoh/home

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