Design of Electrocardiogram (Ecg or Ekg) System on Fpga

International Journal of Electronics and Communication Engineering Research and Development (IJECERD),Volume 3, Number 1, Jan-March (2013)

Posted: 27 Feb 2020

See all articles by Kiran Kumar Jembula

Kiran Kumar Jembula

Department of Electronics and Communication Engineering, JNTU, Andhra Pradesh, India

Prof. G.Srinivasulu

Department of Electronics and Communication Engineering, JNTU, Andhra Pradesh, India

Dr. Prasad K.S

Department of Electronics and Communication Engineering, JNTU, Andhra Pradesh, India

Date Written: 2013

Abstract

The aim of this paper is to design and implement an advanced Electrocardiogram (ECG) signal monitoring and analysis system design using FPGA. An electrocardiogram, also called an ECG or EKG, is a simple, painless test that records the heart's electrical activity. The main Tasks in ECG signal analysis are the detection of how fast heart is beating, whether the rhythm of your heartbeat is steady or irregular and the strength and timing of electrical signals as they pass through each part of your heart. An algorithm based on wavelet transforms which uses the linear quadrature mirror filter (QMF) B-spline wavelet for the detection of QRS complex is developed and implemented on FPGA. The proposed FPGA based Electrocardiogram system can operate with high performance, Time to Market, Low cost, high reliability, long-term to Maintenance, and maximum throughput of 52.67 MSamples/sec. Thus the system can work on both online and offline at maximum throughput. The system is designed and implemented using Verilog language and Xilinx FPGA respectively.

Keywords: FPGA, Electrocardiogram (ECG), FIR, Xilinx, Algorithm a Trous, P and T waves

Suggested Citation

Jembula, Kiran Kumar and G.Srinivasulu, Prof. and K.S, Dr. Prasad, Design of Electrocardiogram (Ecg or Ekg) System on Fpga (2013). International Journal of Electronics and Communication Engineering Research and Development (IJECERD),Volume 3, Number 1, Jan-March (2013), Available at SSRN: https://ssrn.com/abstract=3529036

Kiran Kumar Jembula (Contact Author)

Department of Electronics and Communication Engineering, JNTU, Andhra Pradesh, India ( email )

Hyderabad
India

Prof. G.Srinivasulu

Department of Electronics and Communication Engineering, JNTU, Andhra Pradesh, India ( email )

Hyderabad
India

Dr. Prasad K.S

Department of Electronics and Communication Engineering, JNTU, Andhra Pradesh, India ( email )

Hyderabad
India

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