Design the Mathematical Analysis & Circuit of Data Converters
Proceedings of the 2nd International Conference on IoT, Social, Mobile, Analytics & Cloud in Computational Vision & Bio-Engineering (ISMAC-CVB 2020)
8 Pages Posted: 30 Nov 2020
Date Written: November 23, 2020
The sustained initiative in the direction of technology scaling in Very Large Scale Integration design has given silicon chips for higher integration levels. Appreciations provide for the decrease in lowest chip size and an equivalent reduction in the voltage provides the power supply, discrete ckts have advanced since reserves in the area and power usage. This method grants numerous tasks in Complementary Metal Oxide Semiconductor ckt design. In oxide of the gate of transistors develops “thinner and power consumption” rises, a lesser voltage through supply is essentially used, even still it outcomes in performance ruin of analog ckts. In applications demanding low power consumption and modest conversion speed, one of the most recurrently used (data converter) designs is the SAR. The comparator architecture provides high-resolution.
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