Design of 16-bit ALU with Booths Multiplier Using Radix-4 and Its FPGA Implementation

12 Pages Posted: 12 Jun 2019

See all articles by Prerna Srivastava

Prerna Srivastava

KNIT, Sultanpur, U.P., 228001, India

Rakesh Kumar Singh

KNIT, Sultanpur, U.P., 228001, India

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Date Written: March 19, 2019

Abstract

Arithmetic Logic Unit (ALU) is an essential building block of any microprocessor that accomplish many arithmetic function grounded upon the control input selection. It plays a significant role in performing arithmetical and logical operations on data. All rest of the elements of computer system such as control unit, register, memory, I/O are mainly responsible to carry information into the ALU for process and afterward to retreat the results. It is a combinational circuit, which can perform entire register transfer operation amid 1 clock pulse period from the source register into the destination register through itself. It is the core of any microprocessor system. It evokes fundamental arithmetic function such as addition, subtraction and logical functions including logical AND, logical OR, logical XOR etc. In this paper, we have designed a 16-bit ALU with Booths Multiplier using Radix-4.

Suggested Citation

Srivastava, Prerna and Singh, Rakesh Kumar, Design of 16-bit ALU with Booths Multiplier Using Radix-4 and Its FPGA Implementation (March 19, 2019). Proceedings of International Conference on Sustainable Computing in Science, Technology and Management (SUSCOM), Amity University Rajasthan, Jaipur - India, February 26-28, 2019, Available at SSRN: https://ssrn.com/abstract=3355190 or http://dx.doi.org/10.2139/ssrn.3355190

Prerna Srivastava (Contact Author)

KNIT, Sultanpur, U.P., 228001, India ( email )

India

Rakesh Kumar Singh

KNIT, Sultanpur, U.P., 228001, India ( email )

India

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